An architecture of a differential amplifier commonly used in modern electronic circuits is the so-called open collector architecture. In particular, the open collector architecture is used when an amplifier is required to exchange current with external components. In this situation, the collectors of the differential pair of transistors are coupled to connection pins. The amplifier is supplied by connecting these pins to a DC line through external components.
A typical connection scheme of an open collector differential pair of transistors Q1, Q2 to a supply line by external inductive loads L1, L2 is depicted in FIG. 1. These inductive loads L1, L2 are used for doubling the output voltage swing, which becomes twice the supply voltage.
In the shown example, the AC components of the voltages on the output nodes C1 and C2 are floating, and also depend on the signals applied on the control nodes of the transistors of the differential pair Q1, Q2. This is while the respective DC components are set by the value of the supply voltage VDD.
In these amplifiers it may happen that the voltages on the nodes C1, C2 reach values larger than those established by the technology used. This is due to the spurious common mode, or differential voltages due to inductive loads connected to the nodes C1, C2 and the supply line VDD.
In particular, when the differential amplifier is turned on or off, there are spurious voltage peaks of equal amplitude. The voltage peaks are in phase between them (common mode) on both nodes C1, C2 due to the rapid variations of the current flowing in the inductances L1, L2 superposed to the output voltages, thus raising their level.
To address this problem, several architectures of open collector differential pairs having networks for limiting the output voltage are known. A first example is shown in FIG. 2, wherein each collector node is connected to the supply line by a certain number N of diodes D1, . . . , Dn connected in series. Since VT is the voltage for turning on the diodes (typically 0.8V), when the voltages on the collector nodes C1 and C2 reach the threshold value given byVDD+N*VTthe N diodes D1, . . . , Dn are turned on and limit the maximum voltage on the nodes C1 and C2. This approach effectively limits the voltages on the output nodes both in presence of spurious common mode and differential over voltages.
A drawback of this architecture is that the series of diodes do not turn on instantaneously, but gradually enter in a conduction state. Thus, they distort the output signal when its amplitude is smaller than the threshold value N*VT. Using this limitation network causes a relevant harmonic distortion.
Another architecture is shown in FIG. 3. In this case, the collector nodes are connected by two diode series D1, . . . , Dn connected in parallel. When the differential voltage on the nodes C1 and C2 equals the product N*VT, one of the two series of diodes enters in a conduction state and limits this differential voltage.
The effect of the protection network shown in FIG. 3 is that of reducing the output differential voltage when this voltage reaches too a large value. The protection network does not intervene when at the turning on or off of the device there are spurious common mode voltage peaks on the nodes C1 and C2. Moreover, even in this case, the diodes cause an increase of the harmonic distortion of the output signal.